http://www.oopsla.org/2006/2006/index.php?option=com_content&task=view&id=368&Itemid=447

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SRC06: Optimizing JIT-Compilation Subsystem for Rotor 2.0

SRC06: Optimizing JIT-Compilation Subsystem for Rotor 2.0

The poster describes the design and implementation of optimizing JIT-compilation subsystem for SSCLI (Rotor) 2.0 virtual machine. The subsystem includes controller, run-time sampling profiler, and 2-level (except base) optimizing compiler. This presentation covers overall design of the subsystem, integration issues, and outline of the fast algorithm for 1st level compilation.

Sophia Chilingarova, St-Petersburg State University, Mathematics & Mechanics Department

 

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